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Exp. No.3 VOLTAGE MULTIPLIER CIRCUITS

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الكلية كلية الهندسة     القسم  الهندسة الكهربائية     المرحلة 2
أستاذ المادة محمد جبار محمد امين       11/03/2019 19:47:08
Voltage-multiplier circuits are employed to maintain a relatively low transformer peak
voltage while stepping up the peak output voltage to two, three, four, or more times
the peak rectified voltage.
Voltage Doubler
The network of Figure is a half-wave voltage doubler. During the positive voltage
half-cycle across the transformer, secondary diode D1 conducts (and diode D2 is cut
off), charging capacitor C1 up to the peak rectified voltage (Vm). Diode D1 is ideally
a short during this half-cycle, and the input voltage charges capacitor C1 to Vm with
the polarity shown in Fig.. During the negative half-cycle of the secondary voltage,
diode D1 is cut off and diode D2 conducts charging capacitor C2. Since diode D2 acts
as a short during the negative half-cycle (and diode D1 is open), we can sum the
voltages around the outside loop
Voltage Tripler and Quadrupler
Figure shows an extension of the half-wave voltage doubler, which develops three and four times the peak input voltage. It should be obvious from the pattern of the circuit connection how additional diodes and capacitors may be connected so that the output voltage may also be five, six, seven, and so on, times the basic peak voltage (Vm).
In operation capacitor C1 charges through diode D1 to a peak voltage, Vm, during the positive half-cycle of the transformer secondary voltage. Capacitor C2 charges to twice the peak voltage 2Vm developed by the sum of the voltages across capacitor C1 and the transformer, during the negative half-cycle of the transformer secondary voltage. During the positive half-cycle, diode D3 conducts and the voltage across capacitor C2 charges capacitor C3 to the same 2Vm peak voltage

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